As tighter timing margins and rapidly ascending clock rates drive today's high-speed designs, timing jitter (hereafter referred to simply as “jitter”) is becoming a more significant cause of system errors. Jitter can significantly reduce margin in an otherwise sound design. For example, excessive jitter can increase the bit error rate (BER) of a communications signal by incorrectly transmitting a data bit stream. In digital systems, jitter can violate timing margins, causing circuits to behave improperly. As a consequence, examining jitter and other anomalies is desired to determine the robustness of a system and how close it is to failing.
Recent trends to more rapidly changing signals have led to faster sampling speeds and larger memories with corresponding problems in displaying the data. A number of methods have been developed for displaying jitter and other anomalies in data streams. Signal acquisition devices such as digital storage oscilloscopes (DSOs) can be used to facilitate real time jitter analysis of an SUT. Some prior art attempts take a waveform from a DSO and process the waveform on a personal computer (PC). Other prior art attempts require a user to scroll back and forth along a long acquisition data record. Further, some prior art attempts require computations that are slow and do not identify outliers in the distribution of pulses.